1. Field of the Invention
The present invention relates to a solid-state imaging device, a method for manufacturing the same, and a method for driving the same.
2. Related Background Art
Solid-state imaging devices such as CCD solid-state imaging devices and MOS solid-state imaging devices that include photoelectric conversion sections for converting light into electric charges are employed in various image input devices such as facsimiles, video cameras, and digital still cameras.
FIG. 20 is a cross-sectional view illustrating an example of a structure of a pixel in a conventional solid-state imaging device (this solid-state imaging device is hereinafter referred to as “first conventional example”). In this first conventional example, a N-type photoelectric conversion region 103, a N-type transfer channel region 104, a P-type readout region 105, and a P+-type channel stop region 106 are formed in a P−-type well region 102 that is formed in a N−-type silicon substrate 101. Further, a P++-type hole accumulation region 107 is formed in a topmost part of the photoelectric conversion region 103, and a P-type well region 108 is formed immediately under the transfer channel region 104. A transfer electrode 111 is formed above the transfer channel region 104, the readout region 105, and the channel-stop region 106, with a gate insulation film 110 interposed therebetween. On a surface of the transfer electrode 111, a first interlayer insulation film 113 is formed. Further, a conductive light-blocking film 115 is formed thereon with a second interlayer insulation film 114 interposed therebetween. The conductive light-blocking film 115 is formed so as to cover the transfer electrode 111, and an opening 116 is provided at a position corresponding to at least a part of the photoelectric conversion region 103. Furthermore, generally the conductive light-blocking film 115 is grounded. Furthermore, a protective film 117, a flattening film 118, a color filter layer 119, and a microlens 120 are formed successively in the stated order.
FIG. 22 is a cross-sectional view illustrating another example of a conventional solid-state imaging device (this solid-state imaging device is hereinafter referred to as “second conventional example”). The second conventional example is disclosed in JP 7(1995)-94699 A, for instance. In the second conventional example, a transparent conductive film 121 is formed above the photoelectric conversion region 103 so as to be in direct contact with the P++-type hole accumulation region 107. The transparent conductive film 121 is connected electrically with the conductive light-blocking film 115, which is grounded. The structure of the second conventional example is identical to that of the first conventional example except for where the transparent conductive film 121 is formed.
In the first and second conventional examples, as described above, the P++-type hole accumulation region 107 is formed in a topmost part of the photoelectric conversion region 103. This allows dark current generated thermally on the surface of the photoelectric conversion region to be trapped by the holes in the P++-type hole accumulation region 107, thereby improving the image quality of the solid-state imaging device. The P++-type hole accumulation region 107 is a region in which P-type impurities are diffused at a high density, and which is formed by ion implantation.
FIG. 21 is a schematic view for explaining a method for forming the P++-type hole accumulation region. First, the P−-type well region 102 is formed in the N−-type silicon substrate 101, and the N-type photoelectric conversion region 103 and the like are formed therein. Then, the transfer electrode 111 is formed on a surface of the silicon substrate 101 with the gate insulation film 110 interposed therebetween. Subsequently, the first interlayer insulation film 113 is formed on a surface of the transfer electrode 111, and thereafter, self-aligned ion implantation of a P-type impurity such as boron (B) or boron fluoride (BF2) is carried out by using the transfer electrode 111 and the first interlayer insulation film 113 as masks. By so doing, the P++-type hole accumulation region 107 is formed.
The foregoing first and second conventional examples have the following drawbacks. FIGS. 23 and 24 are schematic views for explaining the problems of the conventional solid-state imaging device, by referring to the configuration of the second conventional example.
In the first and second conventional examples, as described above, the P++-type hole accumulation region 107 is formed by the self-aligned ion implantation of a P-type impurity by using the transfer electrode 111 and the first interlayer insulation film 113 as masks. The ion implantation is carried out with a high dose of 1013 to 1014 cm−2 and with a low energy of several to several tens of kilo electron volts, so as to minimize the incurred erosion of the photoelectric conversion region 103 while efficiently suppressing the dark current generated at a surface of the substrate. Furthermore, the P++-type hole accumulation region 107 is formed so as to cover a substantially entire face of the photoelectric conversion region 103.
It is however difficult to suppress the expansion of a range of the impurity distribution, even with the ion implantation of the P-type impurity with a low energy, because of the relatively high impurity density in the P++-type hole accumulation region 107 as compared with the photoelectric conversion region 103, and the influence of the channeling upon the ion implantation and the annealing for activation after the implantation. Therefore, in the conventional solid-state imaging device, a junction depth (XJ) between the P++-type hole accumulation region 107 and the photoelectric conversion region 103 is 0.3 μm normally, and it is very difficult to decrease the same.
Consequently, as shown in FIG. 23, a part of signal charges 122 generated by the photoelectric conversion easily flow as surface diffusion current 123 into the transfer channel region 104 via the P++-type hole accumulation region 107, thereby causing the problem of an increase in smear. Furthermore, when the signal charges 122 are read out from the N-type photoelectric conversion region 103 to the N-type transfer channel region 104, a charge readout path 124 is formed, which sneaks around the P++-type hole accumulation region 107. Therefore, the readout voltage increases.
Furthermore, problems as follows arise also. Since the P++-type hole accumulation region 107 is formed spreading in a horizontal direction, a space 125 between the P++-type hole accumulation region 107 and the transfer channel region is narrowed. As a result, when a readout pulse (normally about 15V) is applied to the transfer electrode 111 to read out the signal charges 122, hot electrons are generated by a strong electric field between the P++-type hole accumulation region 107 and the N-type transfer channel 104, which cause random noise.
Furthermore, as shown in FIG. 24, in the second conventional example, since the transparent conductive film 121 is formed in direct contact with a surface of the silicon substrate in an area of a photoelectric conversion section 109, junction damage 126 occurs on the surface in the photoelectric conversion section 109. As a result, even with an attempt for suppressing the depletion of a topmost face by grounding the P++-type hole accumulation region 107, dark current is increased through the junction damage 126, which degrades the image quality.